Agrani Labs is building a high-performance AI accelerator designed for the next generation of intelligent computing. We're looking for a talented and driven SOC DV Methodology Lead to join our Hardware Verification Team.

You'll own the end-to-end verification space — from reading the micro-architecture spec and creating testbench architecture, to writing the test plan, closing coverage, and signing off SOC verification.

What You'll Do

As Verification Methodology Lead, you own verification space end-to-end from reading the micro-architecture spec, creating TB architecture, writing the test plan, to closing coverage and signing off the SOC verification. This is a senior IC role for an engineer who has strong hands-on expertise across testbench development, UVM methodology, VIP/BFM design, coverage closure, and verification flows.

What We're Looking For

• 12–15 years of hands-on functional verification experience with strong focus on verification methodology and infrastructure.
• Strong proficiency in SV, UVM, confident in agent development, RAL, factory, phasing, TLM, and sequence architecture. Hands-on experience developing VIPs and BFMs
• Design and develop scalable UVM testbenches for IP-level and SOC-level verification, following established methodology and contributing improvements to it.
• Implement and maintain TB infrastructure components — base classes, register abstraction layer (RAL), scoreboards, reference models, checkers, and utilities.
• Support SOC-level TB integration — connecting IP-level UVCs, virtual sequencers, and top-level stimulus infrastructure.
• Develop UVM sequences, virtual sequences, and scenario libraries — directed, constrained-random, and stress tests.
• Good working knowledge of formal verification — FV flows, property writing, and result analysis.
• Familiarity with emulation platforms (Palladium, Zebu) and adapting TBs for emulation use.
• Proficiency in scripting — Python, Perl, Tcl — for automation and flow tasks.
• Author and maintain structured test plans — mapping design features and micro-architecture intent to verification scenarios and coverage goals.
• Build regression suites — organizing tests into sanity, nightly, run time improvements and full regression tiers with clear pass/fail criteria
• Define and implement functional coverage models aligned with test plan intent.
• Implement negative testing, fault injection, and error recovery scenarios at block and subsystem levels.
• Creative minds with problem solving mindset to drive innovation, efficiency with heavy AI leverage.

Why Agrani Labs?